ABSTRACT
Silicon (Si)-based complementary metal oxide semiconductor (CMOS) technology has emerged as the most predominant technology for the microelectronics industry. To overcome the fundamental limits of Si, maintaining compatibility with the conventional Si processing, several new materials such as strained-SiGe, strained-Si, and silicon–germanium–carbon are currently being considered. Contact resistance to p-type silicon, which was a problem for TiSi2, is the smallest due to its lowest barrier height, and that to n-type silicon was found to be also small. The conventional approach in the Si complementary metal oxide semiconductor technology to the abovementioned problems is to make the silicon thicker in the source and drain regions prior to applying the salicide process. Metal silicides and silicides/germanides have the drawback of less thermal stability and the consumption of silicon/germanium; while the latter is less of a problem for raised source/drains, scaling of vertical dimensions is never the less hampered.
