ABSTRACT
This chapter deals with all-digital noise-shaping time-to-digital converters (TDCs). It examines all-digital open-loop noise-shaping TDCs, including gated ring oscillator TDCs, gated relaxation oscillator TDCs, and switching ring oscillator TDCs. The chapter identifies all-digital closed-loop noise-shaping TDCs. It investigates time registers including gated delay cell (GDC) time registers, switched delay unit (SDU) time registers, gated delay line (GDL) time registers, and gated discharge path (GDP) time registers. It also investigates all-digital time adders including GDC time adders, SDU time adders, GDP time adders, unidirectional GDL time adders, and bidirectional GDL (BiGDL) time adders. All-digital time integrators that are built upon GDC time adders, SDU time adders and ring oscillators, GDP time adders and registers, and BiGDLs are investigated. Time-mode signal processing where information is represented by the difference between the occurrence of two digital signals offer a viable and technology-friendly means to combat technology scaling induced challenges encountered in the design of mixed analog-digital systems.
