ABSTRACT
Technology scaling in the last 15 years has led to a very high level of integration of numerous functions on a single chip: regular digital functions previously included in large-scale VLSI systems and mixed-signal functions recently incorporated to permit single-chip implementations increasingly required in computing and communication applications. The high level of integration leads directly to the issues in chip testing, especially given that the number of I/O has scaled very slowly while the number of devices on chip has increased much faster. Design-for-test (DFT) methods offer an
CONTENTS
11.1 Introduction ................................................................................................ 279 11.2 Mixed-Signal DFT Classifications ...........................................................280 11.3 Mixed-Signal DFT Requirements and Metrics ...................................... 281 11.4 Mixed-Signal DFT Methods: Principles and Conceptual Designs .....283
