ABSTRACT
Departament de Ciencia de la Computacio i Intel-ligencia Artificial, Universitat d: Alacant, Campus de Sant Vicent del Raspeig, Ap. Correus 99, E-03080 Alacant, Spain
Federico Garcia Crespi Departamento de Fisica y Arquitectura de Computadores, Universidad Miguel Hernandez,
Avda. Universidad, s/n, Elche, E-03202, Spain Angel Grediaga
Departamento de Tecnologia Informatica y Computation, Universitat d'Alacant, Campus de Sant Vicent del Raspeig, Ap. Correus 99, E-03080 Alacant, Spain
Received 12 February, 2006; accepted in revised form 14 April, 2006
Abstract: In the underlying finite field of an elliptic curve cryptosystem, squaring and field multiplication is the most computational costly operations other than field inversion. We present a novel VHDL implementation of binary field arithmetic (squaring and multiplication) using Ghost Bit representation. Different comparison of area occupation are considered. Keywords: Finite field arithmetic, binary Galois field, polynomial representation, GBB representation, FPGA, VHDL, recode.
