ABSTRACT
In this book, internationally recognized researchers give a state-of-the-art overview of the electronic device architectures required for the nano-CMOS era and beyond. Challenges relevant to the scaling of CMOS nanoelectronics are addressed through different core CMOS and memory device options in the first part of the book. The second part reviews new device concepts for nanoelectronics beyond CMOS. The book covers the fundamental limits of core CMOS, improving scaling by the introduction of new materials or processes, new architectures using SOI, multigates and multichannels, and quantum computing.
TABLE OF CONTENTS
section Section 1|1 pages
CMOS Nanoelectronics. Reaching the End of the Roadmap
section Sub-section 1.1|1 pages
Core CMOS
section Sub-section 1.2|1 pages
Memory Devices
section Section 2|1 pages
New Concepts for Nanoelectronics. New Paths Added to CMOS Beyond the End of the Roadmap