ABSTRACT
The material of this paper stems from a number of educational applications of the software at the tertiary level, including its use in discrete mathematics course at Bond University, in secondary mathematics teacher education at SUNY Potsdam, and in the framework of collaboration between Intel Corporation and the Faculty of Mathematics and Mechanics of Saint Petersburg State University on a project “Control in the Distributed Systems of Clock Pulse Generators in Multiprocessor Clusters.” One of the topics included in the project is the research and development of mathematical theory of discrete phase locked loops for array processors commonly used in radio engineering, communication, and computer architecture [24]. Such digital control systems showed their high effi ciency in eliminating a clock skew-an undesirable phenomenon arising in parallel computing. To clarify, consider Fig. 1 in which clock C sends pulses via conduit L to parallel processors Pk. The work of parallel algorithms requires that processors involved perform certain operations simultaneously. However, each clock pulse travels a different distance in time to drive each processor. As a result, a time-discordance in the activation of the processors arises. This phenomenon is called clock skew. Digital phase-locked loops have gained widespread recognition and preference over their analog counterparts because of their ability to deal with this phenomenon effectively. From a mathematical perspective, this gives rise to a problem associated with the analysis of global stability of non-linear difference equations that serve as mathematical models of the phase-locked loops [25]; that is, the analysis can be formulated in terms of parameters for such systems.
