ABSTRACT
Conventional computing handles different applications using either (i) a processor with fixed, general-purpose hardware to execute different software or (ii) different, specially designed, fixed hardware. The former approach has an advantage of flexibility with a disadvantage of a speed penalty owing to the use of general rather than special-purpose hardware. The latter approach swaps the advantage and disadvantage. With the advent of hardware that can change configurations relatively quickly, such as the introduction of field programmable gate arrays (FPGAs), an interest arose in exploiting the ability to reconfigure in order to combine speed and flexibility. One direction taken in this interest has been in using existing commercial devices, such as FPGAs, to solve problems with impressive speedups allowed by ever-faster reconfiguration times. A second direction has been investigating the possibilities of reconfiguration by capturing the ability to reconfigure in computational models, developing a body of algorithms
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on these models, and discovering the limits of the abilities of these models. This direction uncovered a rich collection of results and is the direction we recount in this chapter.
