ABSTRACT
Spintronic memories are emerging as one of the next generation storage technologies to replace hard disk drives and current solid state memories. This chapter reviews the underlying physics, and the state of the technology of these emerging spintronic memories. Most conventional solid state memories require one or more transistors or switches per data bit, to a large extent, by the size of a single transistor, the number of transistors needed per memory cell, and the cell layout and architecture. The target market of the domain wall (DW)-motion Magnetic random access memory (MRAM) is high-speed memory macros embedded in a next generation System on a Chip. Compared with conventional MRAM, including spin transfer torque MRAM, the main advantage of DW-motion MRAM is the separation of the writing and read-out circuits and thus, the larger margin for the read-out levels. The racetrack memory is conceptually very different from MRAM.
