ABSTRACT

Low-power design has become a very important and critical issue to enhance the portable multimedia market. The implementation can be categorized into system level, algorithm level, architecture level, circuit level, and process/device level. This chapter describes the impact of each level on low-power design. The algorithm level is the second to the system level, which defines a detailed implementation outline of a required original function. This level has quite a large impact on power consumption. The architecture level is the next to the algorithm level, also in terms of impact on power consumption. The architecture level is explained as microprocessor, DSP (digital signal processor), ASIC (dedicated hardwired logic), reconfigurable logic, and special purpose DSP. There is another category known as reconfigurable logic. Typical architecture is field programmable gate array (FPGA). FPGA sacrifices power efficiency in order to attain wide range flexibility. Usually there occur many glitches in logic block causing extra power at average 15-20% of the total power dissipation.