ABSTRACT
This paper reports on a study of dc and microwave performance for a power MESFET fabricated using a GaAs/Si substrate. In the MESFET, a device pattern layout and a fabrication process are considered in order to reduce a parasitic input capacitance for gate pads originated from a GaAs-Si interfacial conductive layer doped with diffused Si atoms. The MESFET with a gate length and a width of 0.8(μm) and 5.6(mm) demonstrates P1dB of 25.7(dBm), linear gain of 20.5(dB) and η add at 1dB compression of 57(%) at a frequency of 0.85(GHz) and a source-drain voltage of 3.6(V). Moreover, almost the same linear gain and η add are obtained at a source-drain voltage of 2.4(V). From this result, the GaAs/Si is found to be adequately utilized even in devices driven with a low supply voltage aiming at the application to a mobile communication system.
