Submicron PHEMT with a dielectric interface gate

AlGaAs/InGaAs PHEMTs with ultra-thin dielectric Si₃N₄ layers between the submicron gate metals and the recessed AlGaAs surfaces are fabricated. The low temperature grown Si₃N₄ layer with a thickness range of 5-7 nm is expected to enhance the DC isolation characteristic of the AlGaAs barrier and reduce the gate leakage current. Submicron gate devices with the dielectric layers, fabricated by a simple optical lithography technique, exhibit similar f_t and f _max in our RF measurements, but leakage current reduction by two orders of magnitude and 1.5 dB noise improvement compared with the usually processed devices without the dielectric layers.