GaAs Surface Tunnel Transistors with a symmetric source-to-drain structure

New functional Surface Tunnel Transistors (STTs) with a symmetric source-to-drain structure are proposed. These devices have two p⁺-n⁺ interband tunnel junctions back to back between a p⁺ source and a p⁺ drain through an n⁺ channel. The symmetric GaAs-STTs were successfully fabricated using MBE regrowth. They exhibit gate-controlled negative-differentialresistance (NDR) characteristics, which are symmetric with drain bias. The peak-voltage increment due to the reverse-biased tunnel junction is negligible, permitting STT operation. These results indicate that functional circuits can be formed by the new STT structure as well as the conventional STT.