Elimination of mesa-sidewall gate-leakage in InAlAs/InGaAs hfets by selective sidewall recessing

Conventional mesa isolation in InAlAs/InGaAs HFET’s results in the gate contacting the exposed channel at the mesa sidewall, forming a parasitic gate-leakage path. We successfully propose and demonstrate a novel and simple method of recessing the channel edge into the mesa sidewall using a succinic acid based selective etchant for InGaAs over InAlAs. SEM photographs confirm the recessing of the channel along the sidewall. Measurements on HFET’s and on specially designed test diodes fabricated with and without the sidewall isolation step confirm the complete elimination of sidewall-leakage.