ABSTRACT
Due to the rapid growth of Internet of Things (IoT) devices such as smart appliances, health monitoring and surveillance systems, etc., there is a particular focus on memory design. The IoT connects devices to the internet to acquire information about the usage of sensors and embedded structures. Therefore, the ultimate aim is to reduce the average system energy and increase the battery life for IoT devices. IoT devices need to be portable, should consume less power and be light weight. These features provide the advantage of limiting the primary energy source to smaller batteries. Nowadays, ultra-low-power (ULP) systems on chip (SoCs) have extensively become chip makers’ choice. These SOCs require a low leakage memory architecture to operate at lower voltages with technology scaled devices. However, Static Random Access Memory (SRAM) design is challenging in scaled technology due to process and temperature variations that pose huge challenges in designing robust SoCs. Consequently, this chapter mainly focuses on the strategies to reduce the operating voltage of SRAM designed using FinFET technology and to enhance the battery life for ULP IoT devices.
