ABSTRACT
The purpose of this work is to realize a carbon nanotube field-effect transistor (CNTFET)-based ternary processor consisting of ternary control unit, memory, and ALU. CNTFET is the upcoming and most reassuring technology for the substitution of traditional silicon technology due to its benefits like improved mobility, increased current density, and much better control over formation of channel. Ternary memory systems, that consist of three logic levels unlike binary memory, which has two levels, are highly beneficial because of reduced interconnects, higher operating speeds, and smaller chip area. A ternary control unit is implemented with CNTFETs comprising decoders, multiplexers, and binary buffers. The implemented SRAM (Static Random Access Memory) can perform read and write simultaneously, due to the presence of transmission gate-based memory unit. The proposed ALU (Arithmetic Logic Unit) has two units: logic unit and arithmetic unit. Logic unit consists of NAND, AND, OR, NOR, NOT, and BUFFER circuits. Arithmetic unit consists of ternary full adder and ternary multiplier. A high-speed and low-powered-based processor is implemented with the memory, control unit, and ALU. Cadence Virtuoso simulation results display a noteworthy upgrade in the power–delay product (PDP) by 70%. 10 nm Virtual Source CNTFET model is used to implement the ternary circuits.
