ABSTRACT
This chapter presents an effort to derive a unified framework for understanding ADCs with focus on the fundamentals. Several recently published PAs using standard CMOS/ SiGe processes will be shown as state-of-the-art design examples to demonstrate the use of Doherty architecture in low-GHz mixed-signal power amplifiers and mm-Wave 5G multi-band analog power amplifiers. Several recently published PAs using standard CMOS/ SiGe processes will be shown as state-of-the-art design examples to demonstrate the use of Doherty architecture in low-GHz mixed-signal power amplifiers and mm-Wave 5G multi-band analog power amplifiers. The chapter concludes with an illustration of architecture evolution using an example of multi-bit/stage pipeline ADC that transforms to an efficient SAR ADC with all the auxiliary pipelining and folding circuits removed, followed by the closing remarks about the trend of departing from the traditional signal-folding based flash and pipeline ADCs to simple ZX-based quantizers coupled with sophisticated signal-processing and digital error corrections in advanced technologies.
