ABSTRACT
Low-density parity-check (LDPC) codes are capable of proving near-capacity performances, and have been adopted in the standard of the fifth-generation mobile communications. In order to accelerate the convergence speed, serial schedules can be used, and the decoding messages can be generated according to the information produced during the same iteration. In addition to the convergence speed, the error-floor performance of LDPC codes is also critical to applications such as storage systems and optical communications, where extremely low error-floor values are demanded. The decoding messages are updated in the order of rows and columns of the parity-check matrices, respectively, for the LBP and shuffled schedules. The overall sequential decoding process can be divided into several stages, and only part of the decoding messages would be updated in each stage. For a single-edge protograph-based LDPC code, messages to be updated in each stage can be indicated by the index of the corresponding protograph edge.
