ABSTRACT
CMOS scaling has allowed faster, low power, and more processors per unit space. Low power consumption is becoming an increasingly important design measure for analog and digital circuits. Dynamic power consumption reduces quadratically with the scaled power supply voltage, whereas leakage power is limited by the fixed inverse sub-threshold slope (SS). As a result, traditional thermionic transistors’ ability to reduce power consumption is limited (in MOSFETS and FinFETs). At normal temperature, the inverse sub-threshold slope in thermionic-based transistors is restricted to 60mV/decade. To alleviate the inverse sub-threshold slope constraint of conventional transistors, devices with different carrier injection processes are needed. Tunnel FETs are steep slope devices (SS <60 mV/decade at room temperature) with an exceptionally low leakage current, establishing them as serious possibilities for ultra-low power and energy efficient circuit applications. TFETs have been studied primarily in the context of digital circuits and applications.
The utilization of TFETs as an alternative technology for ultra-low power and voltage conversion and management circuits suitable for energy harvesting (EH) sources is discussed in this chapter. Rectifiers, charge pumps, and power management circuits (PMCs) are developed and examined using TFETs, and their performance is evaluated in comparison to existing technologies and circuit topologies.
