ABSTRACT
The development of semiconductor industries relies heavily on scaling of transistors. In this study, we analyzed the impact of I on and I off current using two models of FinFET technology: high-performance (HP) and lower standby power (LSTP) versions of 20 nm, 16 nm, 14 nm, 10 nm, and 7 nm. We used the Predictive Technology Model–Multi Gate (PTM-MG), which is a scaling multigated device model developed by BSIM-CMG. Specifically, we investigated the effect of varying the number of Fins on I on and I off current. The entire simulation is done in SPICE, and from the results it is observed that when back-gate bias is applied to the calculation of the ION and IOFF current, there is no impact on ION and IOFF current both in HP and LSTP models of FinFET; variation is shown, however, as technology scales down from 20 nm to 7 nm.
