ABSTRACT
Thermal congestion in three-dimensional (3D)-integrated circuits may lead to significant performance degradation as well as functional failure. To address performance and functional degradation due to a high-temperature environment, a model of the relative thermal interaction among different modules within a 3D system is introduced, and a thermal aware floorplan methodology based on this thermal interaction model is discussed. Evaluation of a thermal interactions driven algorithm for 3D-ICs on a suite of MCNC benchmark circuits is presented. The improvement in thermal interactions for a homogeneous 3D system demonstrated by the algorithm ranges from 30% to 95%. The peak temperature of a thermal interactions aware floorplan is compared to an area only driven test case. The thermal aware floorplan exhibits up to 56.3° lower temperature at the relevant modules. Application of the algorithm on a heterogeneous 3D system exhibits improvements in thermal interactions ranging from 26% to 74%.
