ABSTRACT
3D integration is considered the most promising solution to overcome current challenges in planar technologies. As an emerging technology, electrical compact models are notably required for 3D interconnects, including Through-Silicon Via, to accurate 3D system performances. However, 3D integration implies that the whole electrical context must be considered, such as current paths or couplings between chip elements or layers in a same die. An alternative way of using a standard approach for substrate analysis, called Integrated Circuit Emissions Model (ICEM), is described: It considers each part of a mixed signal design: the board, the package, the bonding wires, the padring and the core of the digital chip. By adding a substrate RC network to this model, we can simulate the transient parasitic substrate voltage induced by the logical part of a mixed signals integrated system
The authors also present the impact of low frequency substrate noise perturbations on an RF analog circuit: a voltage-controlled oscillator (VCO) spectrum. The oscillation frequency sensitivity functions of tuning voltage and bias current and spurious side-bands, due to injected noise, are measured to find out a relation between substrate noise and spectrum purity.
