ABSTRACT
Aggressive Metal Oxide Semiconductor (MOS) technology scaling in digital circuits has resulted in important challenges including a significant increase in leakage currents, short-channel effects, and drain saturation growth while reducing the power supply voltage for digital applications. This chapter focuses on the fundamentals and modeling of both spin-transfer torque-based and Spin Hall Effect-based magnetic tunnel junctions, which have attracted significant attentions as promising alternatives for complementary MOS devices in both memory and logic applications. Since the inception of the first field-programmable devices, various granularities of general-purpose reconfigurable logic blocks and dedicated function-specific computational units have been added to configurable logic block structures. The unifying computational mechanism underlying all of the MTJ devices is accumulation-mode operation, which enables realization of majority logic functions as basic computational building blocks. In field-programmable gate arrays, static random access memory cells are employed within programmable switching blocks to control the interconnection between logic building blocks.
