ABSTRACT
The emergence of new embedded applications for telecom, automotive, digital television, and multimedia applications has fueled the demand for architectures with higher performance, greater chip area, and improved power efficiency. These applications are usually computation-intensive, which prevents them from being executed by general-purpose processors. Architectures must be able to simultaneously process concurrent information flows, and they must all be efficiently dispatched and processed. This is only feasible in a multithreaded execution environment. Designers are thus showing interest in a System-on-Chip (SoC) paradigm composed of multiple computation resources and a network that is highly efficient in terms of latency and bandwidth. The resulting new trend in architectural design is exemplified by the MultiProcessor SoC (MPSoC) (Jerraya and Wolf 2005).
