ABSTRACT
Advanced complementary metal oxide semiconductor (CMOS) devices have been facing several kinds of physical limitations. The extremely slow voltage scaling down and the process parameter variation induce performance saturation of the bulk CMOS system-on-a-chip (SoC). The silicon-on-insulator (SOI) device has the advantage of suppressing this problem. The smaller junction capacitance provides high-speed switching and the soft error immunity gives high reliability. Additionally, the SOI device can be applied to bulk CMOS circuit design methodologies, suppressing the transistor leakage current and variation of the process parameter, and can enhance performance, utilizing the SOI device structure. This chapter introduces several kinds of low-voltage SOI circuit designs for the SOI CMOS logic gate, static random access memory (SRAM), and higher density memory with a CMOS-compatible process. These techniques enhance system performance and provide the breakthrough of the voltage scaling down.
