ABSTRACT
This chapter focuses on microprocessor technologies. It begins with a high-level summary of processor trends over the recent past and projects ahead on a wide range of architectures with a primary focus on on-chip parallelism. The chapter discusses the implementation space in order to attain a fundamental understanding of the nature of on-chip parallelism and an in-depth understanding of several of today’s most promising new architectures. While a sequential execution model has dominated microprocessors, at the system level, parallel programming models have been developed and are successful in domains that require high performance. Advanced instruction-level parallelism architectures employ a tile-based organization in which a computation resource, known as a tile, is replicated across the microprocessor die to form a two-dimensional computation fabric. Conventional microprocessors rely on the hardware to analyze and identify independent instructions, and to manage their parallel execution. Singleinstruction multiple-data architectures were developed in the 1980s to exploit large-scale parallelism.
