ABSTRACT
This chapter presents HPEC algorithms and applications from a computational perspective, focusing on algorithm structure, computational complexity, and algorithm decomposition approaches. It discusses the computational characteristics of embedded signal and image processing algorithms, focusing on algorithm structure, computational complexity, and algorithm decomposition approaches. One of the major goals of high performance embedded computing (HPEC) is to deliver ever greater levels of functionality to embedded signal and image processing (SIP) applications. HPEC is particularly challenging because not only do high performance embedded applications face enormous throughout requirements, they must also meet real-time deadlines and conform to stringent form-factor constraints. The discrete Fourier transform (DFT) is then applied to the sequence. High performance embedded computing can best be described in the context of the top-level structure of a canonical HPEC application. Most high performance front-end algorithms consist of kernel operations from matrix or vector mathematics, with some special computational constructs, such as butterflies that support fast Fourier transform computations.
