ABSTRACT
This chapter reviews a recently proposed technique that leverages circuit-edit technology to support design obfuscation and trusted fabrication. The shortcoming of such an approach is that it is limited to low-volume production since circuit edit can be performed only on a chip-by-chip basis. The proposed circuit edit-based technique could compete with such approaches for ensuring trusted fabrication. For logic encryption and circuit edit-based obfuscation, further work is required to look into distribution of key gates/gate-level modifications between different IP cores. One side-effect of such contamination is an increased resistivity of interconnect/vias that have been created by circuit edit. The chapter discusses gate-level changes that can be implemented by the design house/designer on such controller units for circuit edit–enabled obfuscation. Split manufacturing enables the splitting of the fabrication process between an untrusted and a trusted foundry. Although circuit edit-based obfuscation makes trusted low-volume fabrication possible, there is a potential concern regarding the performance and reliability of circuit-edited chips.
