ABSTRACT
This chapter provides an overview of copper and low-k interconnect integration including process architectures, materials, performance, and reliability issues as well as future scaling challenges and potential technology directions. The simultaneous integration of copper with low-k dielectrics presented a significant challenge to the industry, and, while the manufacturing use of copper interconnects has become pervasive, each successive technology generation offers new challenges in terms of meeting density, performance, and reliability requirements. While the motivation for moving from aluminum to copper metalization and from oxide to low-k dielectrics is clear, significant material and process innovation has been and will continue to be required to meet the interconnect goals set forth in the International Technology Roadmap for Semiconductors. In the case of copper low-k interconnects, the redeposited film presents an additional challenge, as this material may then diffuse into the porous dielectric, thus degrading the intra-metal isolation and increasing the risk of copper contamination of the entire structure.
