ABSTRACT

In the globalized world with competition and the focus on productivity, the main goal in semiconductor wafer manufacturing is to maximize the output of the fabrication facilities (in short, wafer fabs) under due date constraints. In such an optimized environment, it is essential to have good prediction of fab behavior after a breakdown of critical machines and how to meet the due dates in such a situation. To that end, simulation is a very important tool. Simulation can also be used to test various parameters of machines to find better settings (e.g., as in Rose 2003).