ABSTRACT
Leakage power dissipation in LSI chips has been increasing exponentially with device scaling [14], and has grown to be a major component in the total power dissipation today. Among existing techniques to reduce leakage power, power gating is one of the most promising approaches. Power gating is a technique to shut off the power supply and put the target circuit into sleep mode during periods of inactivity by turning off an embedded power switch transistor.
