ABSTRACT
The goal of achieving terahertz (THz) speeds using silicon-based transistors has generated significant interest. Semiconductor devices are rapidly entering the THz regime, where the resultant circuits are capable of operating from 300 GHz to 3 THz. The consequences of cooling silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) are in many ways similar to that of combined vertical and lateral device scaling. The associated device physics observed at cryogenic temperatures in these devices provide important insights into further device scaling for THz speeds at room temperature. Other than device scaling, a different approach for improving performance is to cool the SiGe HBTs to reach their ultimate performance, as demonstrated in pioneering work on cooled SiGe HBTs. State-of-the-art SiGe HBTs usually have shallow- and/or deep-trench isolations, a boron-doped SiGe: C base layer with about 25% peak germanium concentration, an selectively implanted collector region, a reduced thermal-cycle “raised-extrinsic-base” structure, and an in situ phosphorus-doped polysilicon emitter, at a conservative lithography node.
