ABSTRACT
Field programmable gate arrays (FPGAs) are packaged integrated circuits (ICs) containing groups of logic, interconnects, and I/O referenced as blocks or cells. Design mapping is feasible because each block type within an FPGA can be configured as a piecemeal implementation of the full design. As FPGA technology is evolving, the number of logic cells and potential design complexity is growing. In addition, because FPGA devices already contain logic that can be configured into desired functions, there are no requirements for custom IC masks or fabrication. FPGA cells are generally built using complementary metal oxide semiconductor (CMOS) technology. There are three primary categories of structures that comprise an FPGA: configuration, functional logic data path, and global routes. For an Single event transient to be generated in CMOS technology, an off-gate turns on. In this case, the off-gate can only turn on if the collected charge in its drain is greater than the critical voltage.
