Introduction to Multi-Gate Devices and Integration Challenges

ABSTRACT

In May 2011 Intel announced the introduction of the tri-gate

architecture at the 22 nm technology node [1]. As such, Intel was

the ﬁrst big player in the semiconductor industry to use a 3D device,

going from a pure 2D structure that had been introduced in 1960 [2]

and that had basically not changed much during almost ﬁve decades

of scaling to a new device architecture that was still a MOSFET but

with some new complexities and advantages: in this architecture the

gate is wrapped around a thin conducting channel, also called “ﬁn.”