ABSTRACT
Although polysilicon thin-film transistors (poly-Si TFTs) are attracting much attention for their use in active-matrix liquid crystal displays, fine-grain structures in the channel can affect their carrier transport and device performance. The authors show that a gate-all-around (GAA) poly-silicon (Si) nanowire (NW) TFT exhibited excellent gate controllability because the GAA structure enhanced the electric field. They investigate the performance of GAA NW TFTs featuring multiple gate configurations. The authors compare the tri-gate and GAA structures and studied the impact of multiple channels to further reduce the fluctuations in device performance. They modulate the variations in threshold voltage and subthreshold swing were effectively. The authors explore the Poisson area scatter model to estimate the impact of statistical grain boundary distribution on TFT characteristics. This model has never been adopted to model poly-Si GAA TFTs featuring multiple NW channels, especially for devices with a grain size and channel diameter in the same order of magnitude.
