ABSTRACT
This chapter aims to propose an accurate quantitative metric for measuring the small-delay defect (SDD) coverage of any given pattern set. The SDD test coverage metric proposed in the chapter overcomes all the identified shortcomings of previously proposed metrics and satisfies all mentioned requirements of coverage metrics. The chapter describes the delay test coverage (DTC) and statistical delay quality level metrics for measuring SDD coverage and discusses their shortcomings as accurate and practical metrics. It describes the philosophy and the implementation of the proposed SDD coverage metric. The chapter covers experimental results with several ISCAS89 benchmark circuits and some industrial designs. It describes the proposed metric, referred to as the small-delay defect coverage (SDDC) metric. The SDDC value of a single fault is defined as the ratio of the probability that a delay defect at the fault site will be detected by the test and the probability that a delay defect is timing irredundant.
