ABSTRACT
This chapter reviews the most promising 1T- dynamic random access memory (DRAM) structures by focusing on MSDRAM, ARAM, and Z2-RAM concepts. Silicon-on-Insulator (SOI) technology offers the opportunity to store the charges directly in the floating body of a metal oxide silicon field effect transistor (MOSFET), which is also used to read the memory states. These memories, named floating-body 1T-DRAMs, use only one transistor and take advantage of floating-body effects that are usually regarded as parasitic phenomena. 1T-DRAMs benefit from floating-body effects and coupling mechanisms that are often viewed as undesirable properties. 1T-DRAMs can be classified according to the mechanism serving to generate the majority carriers: impact ionization, bipolar junction transistor, band-to-band tunnelling, gate tunneling current, and photo-generation. The first generation of 1T-DRAMs, called Z-RAM, was demonstrated on partially depleted-SOI MOSFETs with 100 nm design rules. The “unified memory” aims at combining the functionalities of nonvolatile memory and volatile DRAM in a single transistor.
