ABSTRACT
Nowadays, with the development of high speed and large capacity data acquisition system, data storage technology is faced with a great challenge. In order to meet the data access requirement, most of the embedded systems need external memory to extend the storage space, such as network-processor system. Meanwhile, with the improvement of chip speed, slow accessing speed of external storage has become a bottleneck in enhancing the performance of the whole system (ZHUO L 2010). SDRAM is one of the most commonly used external storages (Jian Qituo 2013). So how to improve the performance of the SDRAM is crucial. SDRAM has many advantages, such as low price, large capacity and high processing speed (JEDEC 2010). However, the SDRAM also has more complex control logic and more stringent timing. So a dedicated controller is needed to simplify the access to the SDRAM. The stand or fall of the SDRAM controller design directly affects the efficiency of the SDRAM and external equipment.
