ABSTRACT
3D stacking technology allows integration of different technologies onto a single chip and provides performance benefits by decreasing communication latency. However, stacking resources vertically makes it harder to remove the generated heat, leading to elevated on-chip temperatures. High on-chip temperature is a limiting factor on the performance and reliability of the processor and incurs higher cooling costs. Thus, in order to unleash the true potential of 3D-stacked chips, accurate thermal modeling, design-stage thermal analysis, and development of efficient runtime management strategies are essential.
In this chapter, we elaborate on the state-of-the-art thermal modeling and management techniques targeting 3D-stacked systems. We focus on compact thermal modeling methods together with their integration into full system simulation. We then provide a selection of recently proposed dynamic thermal management techniques, which address the thermal challenges specific to 3D-stacked systems. These techniques include job scheduling, utilizing hardware control knobs, and active cooling using liquid microchannels. We conclude with a brief discussion of the open problems in the field.
