ABSTRACT
The complex nature of heat flow within 3D integrated circuits (IC) results in nonuniform operating temperatures throughout the die stack, and, consequently, in the formation of performance-degrading hotspots. The mitigation of such issues is predicated upon the accurate characterization of the physical design parameters of 3D ICs, and their specific thermal impact. This chapter presents a high-level flow that uncovers the influence of stack composition, physical construction, power density, and the design of the vertical interconnect structure on thermal behavior. These findings provide new insights into the thermal design space of 3D ICs, and the specific role of individual design parameters in reducing operating temperature gradients.
