Programmable VLSI Neural Network Processors for Equalization of Digital Communication Channels

Analog VLSI neural networks are developed for equalization of intersymbol interference and maximum-likelihood sequence estimation. Based on a 4-layered perceptron, the equatizer approximates the optimum receiver. The fabricated chip contains an analog tapped-delay line, (8-12-12-1)-perceptron, and interface circuitry for training. Both simulated and experimental results are presented. A cascadable MLSE receiver using the Hopfield’s neural network is also presented.