ABSTRACT

Quantum neural holography is implemented in a program which bridges the gap between neurophysiology and models of neural network engineering. The thrust of the program is to describe mathematically the neurodynamical functional connectivity of analog association among stimulus-evoked coherent neural wavelets. It represents the basic function of cortical neural network models. Quantum neural holography represents a fundamental change from the standard connectionist models used in Artificial Neural Network (ANN) theory in that it reconciles the linear and highly nonlinear dynamical systems aspect of neurodynamics. A quantum geometry underlying ANNs is needed to explain the local-global duality of adaptive signal processing going on within cortical neural network models. In addition, deterministic chaotic activity patterns and synaptic plasticity must be accounted for if the modelling is used for learning.

To initially realize such a model, the computational neuroanatomy of the retina is utilized. The retina forms a multilayered precortical perceptual transducer which collects and preprocesses the information that reaches the visual cortex. To emulate biophysical neural network computation by the analog VLSI implementation technology, an analog model of the first stages of retinal processing has been constructed on a single silicon chip by CMOS VLSI circuitry and applied to machine vision. The purpose of this paper is to study the exactly solvable hexagonal resistive networks which model the horizontal cell layer of the retina. An outlook to free-space multilayer architectures of hybrid optoelectronic interconnection network models is also given. It is shown 234that the parallel shift register stage used in the horizontal and vertical scanner of the silicon retina implementation is in correspondence to the S-SEED technology in the hybrid optoelectronic implementation of interconnection network models. Specifically, analog VLSI networks are considered. These networks are implemented by dynamical holographic interconnects using analog synaptic weights.