ABSTRACT
Objectives This chapter describes the architecture and technologies of FPGAs. This chapter should help you: • Understand the internal architecture of FPGAs • Gain knowledge of the technologies used for programming and connecting
internal blocks of FPGAs • Learn the advantages and trade-offs of different architectures and technolo-
gtes • Learn the differences between CPLDs and FPGAs
3.1 FPGA Architectures Each FPGA vendor has its own FPGA architecture, but in general terms they are all a variation of that shown in Figure 3.1. The architecture consists of configurable logic blocks, configurable 1/0 blocks, and programmable interconnect to route signals between the logic blocks and 1/0 blocks. Also, there is clock circuitry for driving the clock signals to each flip-flop in each logic block. Additional logic resources such as ALUs, memory, and decoders may also be available. The two most common types of programmable elements for an FPGA are static RAM and antifuses. Antifuse technology is a cousin to the programmable fuses in EPROMs. You will learn about
Interconnection Resources
antifuses, along with these other aspects of Figure 3.1 FPGA architecture FPGAs, in the following sections.
