ABSTRACT
The lowest level of design hierarchy in the design automation system proposed in this book is the layout level. This level should take in a circuit description in some format at the transistor level and should output a layout description in some other format. However, the problem is not a simple geometrical one since the layout directly affects the performance of the circuit through several criteria, the most important being parasitics and device matching. In the subsequent pages, fundamentals of layout design automation and the specific problems pertaining to analog design will be presented along with a comprehensive review of the literature in this area.
