ABSTRACT
This chapter introduces the beginning of the high-end processor organization that commences with the appearance of pipeline approach in CPU architecture providing instruction-level parallelism (ILP), thereby yielding notable performance improvement. To effectively implement this approach, appropriate pipeline control and collision-free scheduling of instructions without hazards are required. Numerous methods thus have been devised to combat the ill effects of the various types of inherent hazards, for the sake of realising smooth operation of the pipelined processors. Further enhancements following this line have been carried out that give rise to superpipeline architecture (or deeper pipeline)and subsequently superscalar architecture of processor (machine-level parallelism using multiple-instruction pipeline) to realise even more throughput. Superscalar processor has been once again modified to introduce the superpipelined superscalar processor to yield even higher throughput. An alternative approach in the architectural design of the processor has been also carried out that gives rise to very long instruction word(VLIW)and explicitly parallel instruction computer (EPIC) architectures in processors to yield even more increased throughput. To yield greater ILP, even beyond the expected limit, by way of reducing the aggregate of dependencies in the pipeline and also without much increasing circuit complexity or power consumption, is an elegant approach, called multithreading or thread–level parallelism, which now becomes a norm and not an exception for architectural design of any kind of processor. All the performance improvement approaches, like superscalar VLIW, etc., by this time have already reached their extreme saturation point in terms of effective implementation. This gives rise to the ultimate appearance of inevitable multicore architecture in the evolution process of the processor design. A multicore processor, also known as a chip multiprocessor, combines two or more independent processors (called cores) on a single piece of processor chip (a single piece of silicon, called a die). The definition, design issues, and effective multicore organization, and subsequently multithreading implementation in multicore architecture to realize highest possible throughput have been described with appropriate illustrations. Commercially popular representative processors of this type are also included as case studies.
