ABSTRACT
The emergence of RISC (reduced instruction set computer) machine is considered as a renaissance in the area of computer architectural developments although many truly remarkable innovations have already been made in this area by this time. This chapter gives an overview of the characteristics of existing CISC (complex instruction set computer) architecture and its drawbacks, and then introduces an understanding of RISC architecture with its definition and features. It also enunciates the different aspects that are relevant to the RISC versus CISC debate. The design issues and instruction set of RISC processors, including the instruction format and addressing scheme, have been here articulated. The comparisons of a RISC processor with a contemporary CISC processor in terms of their important architectural design parameters have been described. Lastly, a brief description with schematic diagrams relating to architectural designs of a few leading representative RISC processors of different types has been portrayed.
