This chapter describes the evolutional device technology introduced in Mbit dynamic random access memory (DRAM) generation, and forecast technology trends for 1Gbit DRAMs and beyond. Several evolutional device technologies have been introduced with the fine patterning technology to increase memory capacity. The use of CMOS instead of the traditional NMOS circuit reduced power dissipation of 1 Mbit DRAM to one half of that of NMOS due to the reduced peripheral circuit current, which results from CMOS peripheral circuits and CMOS decoders. The requirement for large scale integrated circuits from downsizing systems are small size, value-added, low voltage, low power dissipation, large integration, high reliability, high speed, and low cost. The research on silicon quantum effects has begun to identify a new phenomena related to device reliability, such as single electron trapping in gate oxide causing drain current fluctuation and velocity overshoot causing the drain current increase25; however, the research has been directed toward the new quantum devices.