ABSTRACT
This chapter presents a description and analysis of a model arising in algorithms for parallel computing. As computer chips approach physical limits, practitioners turn to parallel computation for increased speed. The chapter is concerned with a parallel algorithm for parallel execution of event-driven simulation, such as calls in a telephone network. The communications and time-stamping mechanism provides a way to detect errors. In order to correct these faults, each processor needs to keep track of its past states, and restart the computation from the point the error was made.
