ABSTRACT
In comparison with other analog-to-digital converters (ADCs) and digitalto-analog converters (DACs), delta-sigma (∆Σ) data converters (or generally oversampling data converters) exhibit a reduced sensitivity to analog component matching. ∆Σ converters are usually the best choice for applications requiring a resolution greater than 20 bits. In these converters, the input signal can be sampled at a rate much greater than the Nyquist frequency (i.e., twice the bandwidth or highest frequency of the signal being sampled), and the quantization noise is shaped by the modulator to be low in the signal band and high in the out-band spectrum. The specifications of either the analog anti-aliasing filter for the analog-to-digital conversion or the smoothing filter for the digital-to-analog conversion are then relaxed due to the signal oversampling, and the remaining out-band noise is attenuated by a filter. The actual reduction of in-band noise power level depends on the modulator structure and the oversampling ratio (OSR) and a high resolution is achieved with a penalty in speed, as the modulator hardware has to operate at the oversampling rate, and an increased complexity of the filter hardware. Oversampling data converters then present a trade-off between speed and resolution.
