ABSTRACT
Systems based on heterogeneous multi-processor architectures have been recently exploited for a wide range of application domains, especially in the System-on-Chip form factor. Apart from possible differences on terminology and composition, for this kind of systems one consideration is always true: they are so complex that the adopted HW/SW Co-Design Methodology plays a major role in determining the success of a product. The first step of the proposed co-design flow is the Functional Simulation where SBM is simulated to check its correctness with respect to some Reference Inputs. The early detection of anomalous behaviors allows the designer to correct the specification avoiding a late discovery of problems that could lead to time-consuming design loops. The SW-mapped processes are typically transformed in C code, with the support of a possible embedded and/or real-time OS, while the HW-mapped ones are transformed in synthe-sizable HDL code or implemented by means of existing COTS component depending on the final system form factor.
