ABSTRACT
Multi-Valued logic (MVL) is considered a key enabler for next-generation and high-information-density digital electronics. While the conventional approaches to MVL systems rely on circuit-level design and implementation, the emergence of new electronic materials and device concepts now enables the MVL operation in a greatly reduced complexity and with intriguing new functionalities. The MVL system's viability in real-world applications is contingent on overcoming two major challenges: developing an efficient mathematical approach for implementing the MVL logic using existing technology, and the availability of effective synthesis techniques. In this chapter, previously designed robust arithmetic operations will be implemented in the ternary logic in DNA computing. A multi-valued or ternary half adder is a sort of adder, which is an electrical circuit that performs ternary number addition. To design a DNA ternary half adder, it is needed to use DNA decoders so that it is possible to decode the input bit into the corresponding bits.
